A linear regulator load step response at 10 MS/s, 50 MS/s, and 250 MS/s.

Avoiding these common pitfalls will get you better data with minimum effort. Steve Sandler takes a look at four common scope mistakes and gives details on how to avoid them. This particular mistake focuses on bandwidth and sample rates.

The engineering community uses oscilloscopes more than any other piece of equipment, and yet many of the published results are questionable at best. Some errors are very common, and so we can eliminate a great deal of bad data by considering a few simple, but key points. This first part of a four-part series covers: insufficient bandwidth and/or sample rate.

The majority of engineers only have one oscilloscope on their bench. This is likely due to cost. While this may be acceptable, it presumes that the one oscilloscope meets all of our time-domain measurement requirements. Let’s consider just a few of the scenarios that a typical engineer might face, and evaluate the bandwidth and sample rate required for the measurement.

Case 1: a simple high-speed CMOS logic gate
It is rare that any electronics these days would not include some type of digital gate or buffer. In this simple case, we are using a NC7SZ04 Tinylogic inverter gate, connected to a 10-MHz SMD oscillator. The 10 MHz is not significant. It is just a handy example. In using such a logic gate, we might consider the rise and fall time of the gate. The rise will impact the noise generated on the supply voltage rail and will also provide some guidance on the narrowest glitch we might need to capture if we needed to troubleshoot the circuit.

Click here to read the complete article at EETimes.com.