Learn how Brian Hostetler from HPE, Inc explains the measurements made on a few different power rails on a printed circuit board (PCB) assembly.

The primary task was to measure the impedance of a 3.3 V rail named VDD_3V3_S0. This rail needed to have low noise/ripple and provides 20.7 A to its load

It is a single-phase current-mode buck regulator fed from a 12V source.
A prototype Picotest 2-port probe was selected to make the impedance measurements. Ideally, the impedance of any rail is most important at the load. However, since the primary concern on this rail is the low-frequency impedance (e.g. control loop resonance), the impedance can be measured near the VR instead of at the load. In some scenarios, this can be easier and requires minimal modifications to the PCB.


Since only the low-frequency impedance needed to be analyzed, a Bode 100 was used, with the following setup and calibration method:

 · Impedance Analysis: Shunt-Thru
– Place common mode choke on CH2
– Place 12 dB amplifier on output
– Change stop frequency to 50 MHz
– Use logarithmic sweep with 201 points
– Use constant source level at full power (13 dBm)
– Change receiver bandwidth to 30 Hz
– Set Ch1 ATT to 20 dB, Ch2 to 40 dB
 · Perform OPEN calibration
– Set Ch2 ATT to 10 dB
 · Perform SHORT calibration
 · Perform 1 Ω LOAD calibration


To calibrate the VNA, the homemade calibration board shown in Figure 1 was used. Several reference resistors can also be seen that are used to validate the calibration. Notice that the 1 Ω load calibration resistor is actually ten 10 Ω resistors soldered together in parallel.

Figure 1 - Homemade calibration and reference resistor board


The measurements from the Bode Analyzer Suite are shown in Figure 2.


Trace 1: Impedance Magnitude (Ω)

Figure 2 - Reference measurements after calibration


Figure 2 – Reference measurements after calibration

It can be seen that the noise floor in this setup is around 50 µΩ. It is higher at the highest frequencies (>10 MHz) primarily due to mutual inductance between the probe tips.
The solder mask was removed from the PCB to create a probing measurement port on VDD_3V3_S0 as seen in Figure 3.

Figure 3 - VDD_3V3_S0 measurement location


Figure 4 shows a snippet of the layout illustrating the copper on the top layer of the board.
The approximate probe location is indicated by a blue circle at the bottom of the figure.

Figure 4 - Layout of VDD_3V3_S0 regulator

The impedance was then measured with the VR energized and de-energized, as seen in the measurement data of Figure 5.

Trace 1: Impedance Magnitude (Ω Figure 5 - VDD_3V3_S0 OFF (red) and ON (green) impedances



The OFF impedance is the red trace and the ON impedance is the green trace. The green trace is the most critical to validate the rail. It is a requirement that there are no sharp parallel resonances on the rail (with a Q > 1.4). The impedance also needs to be below the target at all frequencies. Our target for this rail is approximately 8mΩ to 7kHz. This is based on a 5 % voltage deviation and a 50 µs, 20.7 A current step. The target impedance is then allowed to rise inductively (20 dB per decade) from the point at 8 mΩ, 7 kHz. The measured impedance in this case is well
below the target.


This VR also implements a very shallow 100 µΩ loadline. Theoretically, that should be visible at the lowest frequencies, but an apparent 2 mΩ loadline is seen in this plot. This is due to the resistance between the probe location and the remote sense location for this rail.


With the same calibration, the VDD rail (core power, <1V) was measured near the
multiphase current-mode VR, as seen in Figure 6. In similar fashion to the previous rail, the ground side pogo pins contact ground copper that surrounds the inductors and the power-side pogo pins connect to the output of the inductors.

Figure 6 - VDD measurement location

The results are shown in Figure 7.


Trace 1: Impedance Magnitude (Ω)
Figure 7 – VDD OFF (blue) and ON (red) impedances


Figure 8 shows the measurement location of another sub-1V multiphase current-mode power rail, named AVDD.

Figure 8 - AVDD measurement location

The results are shown in Figure 9.

Trace 1: Impedance Magnitude (Ω)
Figure 9 - AVDD OFF (magenta) and ON (green) impedances



Lastly, a single-phase voltage-mode buck VR rail was measured. This rail is named AVDDH and was also measured near the inductor output. The result is shown in Figure 10.


Trace 1: Impedance Magnitude (Ω)

Figure 10 - AVDDH OFF (orange) and ON (red) impedances


This rail does not have the capability of implementing a loadline, which is apparent in the red impedance curve. The impedance continues to decrease toward 0 Ω as the frequency decreases.
The Picotest 2-port probe is a very useful probe for quick measurements. Calibration is fast and repeatable. Furthermore, minimal modifications are required to the device under test. Using four contact points instead of two results in a much lower noise floor. This is true because contact resistance can be calibrated out and mutual inductance between probe tips is minimized.

The probe could also be used for much higher-frequency measurements with a high-frequency VNA. In that case, it is critical that the probe tip pins maintain identical deflection during calibration as they would when making a measurement. This can be accomplished by fully depressing all four pogo pins for each calibration step and each measurement.

Calibration on a high-frequency VNA would
involve Short-Open-Load (SOL) calibration steps on each port individually. Then, an isolation calibration step would need to be run for each port with 50 Ω resistors at the ends of each port’s probe tips. The isolation calibration cannot be omitted since it is responsible for correcting coupling between the ports due to mutual inductance. Mutual inductance (and its inconsistency from calibration to measurement) is the most significant source of error at high frequencies.