Two things became apparent to me during our recent series of 2017 Hands-On Power Integrity Workshops. First, the majority of attendees weren’t power supply designers, or even analog engineers. They were highspeed circuit designers and printed circuit board designers. In other words, they were power consumers. The second surprise was that there was much less interest in why the power integrity (PI) performance was what it was than how to correct it. For those engineers who want to know what steps they can take to prevent or quickly mitigate PI-related problems in their system designs, I promise you that this article will provide the quickest and easiest path to power integrity.

What Are The Goals? While there are many aspects to achieving power integrity, most engineers are struggling with the impedance aspects of the power distribution network (PDN) as impedance controls the voltage range of the power to the high-speed chips. As the high-speed devices switch, they consume large pulses of current with fast edges. The role of the voltage regulator module (VRM) (or any on-board voltage regulator) and the circuit board decoupling is to manage the voltage transients that result from these high-speed current demands.

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