Power Integrity
Measuring, Optimizing, and Troubleshooting Power-Related Parameters in Electronics Systems
By Steve Sandler
A complete guide to the proper selection and use of test equipment for the measurement of modern power electronics
“…Sandler focuses upon the best practices that he and his colleagues have used as ‘tried and true’ methods to correctly represent the (PDN) performance of a circuit in an actual environment in which it will be used.”
Power Integrity provides engineers with expert insight on selecting and implementing appropriate test equipment to effectively measure increasingly higher-speed electronics. The book contains field-tested information related to the interpretation of results, common measurement issues and resolutions, and application examples. You’ll learn how to select the appropriate equipment and use effective techniques to reduce production problems, improve performance, and provide a figure of merit for comparing different parts and manufacturers.
- Teaches how to properly assess electronics from a black box perspective with a minimally invasive approach
- Covers measurement and troubleshooting techniques for EMI, a particular challenge in tablets and smartphones
- Discusses the latest devices such as Enhancement Gallium Nitride on Silicon (eGaN)
“For those of you who design and verify power supplies, I would highly recommend Steve’s new book to ensure your designs are built and characterised correctly.”
Benefits
- GAIN VALUABLE EXPERIENCE
- Learn how to make accurate and high fidelity measurements with confidence
- Learn about all the key measurements necessary to test your power systems
- Gain confidence in your test procedures
- Learn which test is the right one to perform
- Learn about equipment and test setup limitations and how to address them
- Learn how to spot bad test data whether from manufacturers or from your own measurements
Sandler’s emphasis to Test & Measurement equipment developers to raise their awareness of the complex issues faced by design engineers on the bench and in the Test departments of companies around the globe is a wake-up call to many.
Target Audience
Anyone involved with designing or utilizing power systems, anyone using or designing voltage regulators, linear or switching.
Reviewer’s Agree
Power Integrity is a Must-Own Book for Power Supply and PDN Designers
“His practical techniques in test and attention to details regarding pitfalls and guidance in correct and accurate methods are a sure path to success for engineers to ‘do it right’.”
“For those of you who design and verify spacecraft subsystems and test satellite hardware, the book will serve as a useful reference…”
“I suspect that for engineers reading this book, there may be many surprises, as they discover the breadth of methods described by the author”
“I wish labs in universities would follow Sandler’s book…”
“…Sandler focuses upon the fact that power supply performance is so very much critical to every electronic design system in the industry.”
“This book would be sitting on my shelf as a designer years ago if it were available back then.”
Chapter 2
How to Design for Power Integrity: Finding Power Delivery Noise Problems, June, 2015
This video provides an understanding of how the voltage regulator module (VRM) interacts with the printed circuit board planes and decoupling capacitors within a power distribution network (PDN). A well designed PDN provides optimum system performance while a poorly matched designed PDN can result in poor system performance. In the extreme case, rogue waves can occur within the PDN generating much higher voltage noise levels than expected, potentially interfering with system performance or resulting in permanent damage. Recommendations for keeping the impedance flat are also provided.
Chapter 3 & 4
How to Design for Power Integrity: Measuring, Modeling, Simulating Capacitors and Inductors, November, 2016
Power supply switching ripple and control loop phase margin are dominated by the output inductor and the bulk capacitors. Simple RLC capacitor and inductor models can result in a design with more capacitors than necessary adding to the design cost, consuming valuable circuit board real estate and degrading the control loop performance. Most capacitor datasheets provide very limited information, such as maximum ESR at 100kHz and not the desired information regarding typical values and frequency dependencies of the C, ESR, and ESL. This short video will show how to make these measurements efficiently and how to use the results directly or create high fidelity measurement based models for simulation in ADS.
Chapter 5
How to Design for Power Integrity: Selecting a VRM, May 5, 2016
Many signal and power integrity issues are the result of poor VRM selection. This critical selection is often made arbitrarily due to insufficient, incomplete or incorrect data. Costly design time and multiple board spins can be minimized by following a few simple guidelines and performing a few simple simulations and measurements early in the process. This video explains why one should avoid Voltage mode VRMs and shunt compensation for the VRM Error Amplifier. The better performance of a current mode VRM with series compensation for the Error Amplifier is clearly demonstrated with simulations and measurements.
Chapter 6 & 7
How to Design for Power Integrity: DC-DC Converter Modeling and Simulation, April 7, 2017
Creating a model from a datasheet isn’t an option since much of the data required isn’t published. Fortunately, a measurement based model (MBM) can easily be developed using just a few, simple measurements. The model supports AC, DC, Transient, HB and EM simulations allowing fast, real-time optimization of the VRM design. 1. The LM25116 with Voltage Amp Feedback (a buffered OTA) 2. The Simple LM20143 with Output Transconductance Amplifier (OTA) Feedback 3. Multiphase Operation with the TPS40140 4. Building the Power Integrity Eco-System with VRM and PDN Models.
Chapter 8
How to Design for Power Integrity: Optimizing Decoupling Capacitors, June, 2018
Learn how to optimize decoupling capacitors for the best cost vs. performance using flat target impedance design methods. Impedance peaks caused by parallel L-C resonances in the power distribution network (PDN) are potential sources of power rail ripple and increased EMI. Bulk capacitors must be selected to ensure power supply stability while high frequency decoupling must insure the required bandwidth at the Load. Simple SPICE simulations fail to account for PCB parasitics and often result in the wrong selection of decoupling capacitors. Utilizing EM models of the PDN and combining them with power supply state space average models and the spectral requirements of the load result in good agreement with measurements. Optimizing this PDN ecosystem shows that designing for flat impedance is the best way to achieve the lowest noise on the power rail with the minimum number of capacitors.